Here is a simple 2-input AND logic gate that you can share with students:
This was fun to create and refactor. Any other AND gate solutions?
Sorry - I should provide some context:
INPUTS
blue bit at top is INPUT A (left is 0, right is 1)
purple gear bit series below is INPUT B (left is 0, right is 1)
OUTPUT
black trap at bottom left represents 0
black trap at bottom right represents 1
TRUTH TABLE
A B Output
0 0 0
1 0 0
0 1 0
1 1 1
…and a simple 2-input NAND gate, too. I’m not a computer engineer, but a colleague of mine is, and they told me that if I can build a NAND gate, then all other gates can be derived from this!
TRUTH TABLE
A B Output
0 0 1
1 0 1
0 1 1
1 1 0
Does anyone have any other arrangements for an AND or NAND gate?
Left Trap is False, Right Trap is True. The bits are inputs.
Wow! So awesome…I’m impressed. And - we can simplify it even further with:
https://jessecrossen.github.io/ttsim/#s=13,17&z=32&cc=6&cr=8&t=3&sp=1&sc=0&b=data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAA0AAAASCAYAAACAa1QyAAAAAXNSR0IArs4c6QAAAOFJREFUOE/tk9EJwjAQhv/DBTrCZQYHaCkO0lL3aBYptHuIZALpBpd3QZzAyKkp2gQffPYgJLnclyP358g5d2uaBjrGcURVVXDOIdrab60FRUiDRDyM4QWIi2Hw6LqnPwMJ0fGIUNcwxgQRoQjqPoE0gEBgw/AieESsTMElU1mWy41EhBAC4rwGp2kKjze9Q5kEH64/9CrH74Ww1t7WZe77ftGtbdtEZ2LmBBIvMGww+AEdd4l0CfT+q3NC63k2UwRzkLZPFtJgBXOm/UZACHve4lRcsLnucC4OKGaP+csnvAMlAqCwf4gY4gAAAABJRU5ErkJggg==